Microchip Technology /ATSAME51J19A /GCLK /PCHCTRL[42]

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Interpret as PCHCTRL[42]

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GCLK0)GEN0 (CHEN)CHEN 0 (WRTLOCK)WRTLOCK

GEN=GCLK0

Description

Peripheral Clock Control

Fields

GEN

Generic Clock Generator

0 (GCLK0): Generic clock generator 0

1 (GCLK1): Generic clock generator 1

2 (GCLK2): Generic clock generator 2

3 (GCLK3): Generic clock generator 3

4 (GCLK4): Generic clock generator 4

5 (GCLK5): Generic clock generator 5

6 (GCLK6): Generic clock generator 6

7 (GCLK7): Generic clock generator 7

8 (GCLK8): Generic clock generator 8

9 (GCLK9): Generic clock generator 9

10 (GCLK10): Generic clock generator 10

11 (GCLK11): Generic clock generator 11

CHEN

Channel Enable

WRTLOCK

Write Lock

Links

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